Wednesday, August 17, 2005
Toshiba's 1GHz 65nm Media Processor
Posted by Suhit Gupta in "NEWS" @ 05:00 PM
For those of you that have studied computer architecture, in school or elsewhere (I recommend the Patterson & Hennessy books), will appreciate the following - a new nine-stage instruction pipeline, extended from the previous five-stage pipeline. The h1, founded upon a 32-bit RISC core, also features an instruction re-order buffer, and multiple MePs can be connected to form a single system-on-a-chip. Anyways, I am happy to hear that Toshiba has manufacured this new chip. It will probably make embedded devices so much faster.